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Silicon Labs /Series1 /EFM32GG12B /EFM32GG12B110F1024GQ64 /CMU /HFPERCLKEN1

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Interpret as HFPERCLKEN1

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31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (UART0)UART0 0 (UART1)UART1 0 (WTIMER0)WTIMER0 0 (WTIMER1)WTIMER1 0 (CAN0)CAN0 0 (CAN1)CAN1 0 (VDAC0)VDAC0 0 (CSEN)CSEN

Description

High Frequency Peripheral Clock Enable Register 1

Fields

UART0

Universal Asynchronous Receiver/Transmitter 0 Clock Enable
UART1

Universal Asynchronous Receiver/Transmitter 1 Clock Enable
WTIMER0

Wide Timer 0 Clock Enable
WTIMER1

Wide Timer 0 Clock Enable
CAN0

CAN 0 Clock Enable
CAN1

CAN 1 Clock Enable
VDAC0

Digital to Analog Converter 0 Clock Enable
CSEN

Capacitive touch sense module Clock Enable

Links

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Register License

  • SPDX-License-Identifier: Zlib
  • The licensor of this software is Silicon Laboratories Inc.
  • This software is provided ‘as-is’, without any express or implied
  • warranty. In no event will the authors be held liable for any damages
  • arising from the use of this software.
  • Permission is granted to anyone to use this software for any purpose,
  • including commercial applications, and to alter it and redistribute it
  • freely, subject to the following restrictions:
    1. The origin of this software must not be misrepresented; you must not
  • claim that you wrote the original software. If you use this software
  • in a product, an acknowledgment in the product documentation would be
  • appreciated but is not required.
    1. Altered source versions must be plainly marked as such, and must not be
  • misrepresented as being the original software.
    1. This notice may not be removed or altered from any source distribution.
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Register Reference

https://github.com/cmsis-svd/cmsis-svd-data